Addressing SoC Design Challenges in the Era of SysMoore: From Architecture to Silicon Lifecycle ManagementShankar Krishnamoorthy
Biography
Shankar is the general manager of the Digital Design Group, responsible for the digital design platform including synthesis, signoff analysis, place-and-route, test automation, and formal verification solutions. Most recently, he served as senior vice president of the Digital Implementation Group, delivering several game-changing innovations including Fusion Compiler, RTL Architect, 3DIC Compiler, TestMAX solutions. Shankar has more than 25 years of experience leading world-class teams that have delivered the industry’s premier IC physical design and logic synthesis solutions. Before rejoining Synopsys in 2017, he was at Mentor Graphics where he served as general manager of the IC Design Solutions Division. He joined Mentor in 2007 as part of the acquisition of Sierra Design Automation, where he was the founder and CTO. Prior to Sierra Design, Shankar led Synopsys’ Physical Synthesis and Logic Synthesis R&D organizations. He began his career at Synopsys in 1992 working on logic synthesis technology. Shankar received his M.S. in Computer Science from the University of Texas, Austin in 1992, and his bachelor’s degree in Technology and Computer Science from the Indian Institute of Technology, Bombay in 1990.
Abstract
Abstract Amount of compute power required in today’s SoCs, especially in AI applications, is outpacing Moore’s Law by a wide margin. Orders of magnitude compute are needed to keep pace with this new era of scaling and system complexity, otherwise known as the SysMoore era. In this presentation we examine the challenges driving the next wave of innovative design solutions. Starting with architecture exploration to silicon-lifecycle management, these solutions will help engineers create designs that keep pace with the compute power SoC needs of today and tomorrow. |
The Exciting New Super-Cycle In SemiconductorsDr. Ravi Subramanian
Biography
Ravi Subramanian is the Senior Vice-President and General Manager of Siemens EDA’s IC Verification Solutions Division. He joined Siemens EDA (Mentor) in 2014 via the acquisition of Berkeley Design Automation (BDA), where he was co-founder, President and CEO. Prior to BDA he was VP and GM of the 3G WCDMA BU at Infineon Technologies Secure Mobile Division, He joined Infineon through the acquisition of Morphics Technology, a 3G fabless semiconductor company where he was co-founder and VP of Engineering, and then CEO. He began his career at AT&T Bell Labs, where grew to lead the Radio Systems Research Department and won the AT&T Leadership Award. Ravi received his Bachelor of Science (Honors) in Electrical Engineering from the California Institute of Technology and a Ph.D. in Electrical Engineering & Computer Science from the University of California at Berkeley, where he received the prestigious UC Regent’s Fellowship. He is the lead author on 18 U.S. patents on digital, analog and RF signal processing techniques in communications. Since 2007, he has been selected every year to the Rutberg Wireless Influencers List. In 2019, he was elected to the Forbes Technology Council.
Abstract
The semiconductor industry is at the beginning of a new renaissance – one that will change the world, yet again. The era of specialized chips and software workloads has arrived, and with that comes new opportunities to digitally transform many industries- from the core to the edge. In this talk, we will look at the worldwide economic landscape and how semiconductors are leading the way to digitally transform many industries- from factories to cars to shopping. We will see why specialization is central to the next wave of growth and show how this is bringing dramatic changes in design, verification, and manufacturing of SoCs. Whether it is SoCs at the core (datacenter) or at the edge (imaging sensors), new types of computing are emerging. With new demands on computing, new computer architectures are emerging in SoC designs to enable power-efficient information processing. The verification of these ICs in the systems they operate is rapidly becoming the biggest challenge in getting these products to market and then monitoring their operation in the system during the lifetime of the SoC. We will examine what is happening to this world of new SoCs in this new semiconductor super-cycle. |
Solutions for power efficient performance for leading edge designsLokesh Korlipara
Biography
Lokesh Korlipara has a background in physical design with over 25 years of experience. He joined Cadence in 2002 through a merger of Plato Design Systems, bringing the NanoRoute product to Cadence. During his time at Cadence he has contributed to the development of digital solutions across multiple functional spanning the digital flow. As a Product Engineering Sr. Group Director, his current responsibilities include Samsung Foundry Technology Enablement on Cadence solutions and deploying Cadence Digital full flow solutions at market leading customers.
Abstract
In today’s global environment, everything is about data…. Big data. Our economy is, in fact, driven by all aspects of data handling (creation, transmission, storage and analytics), and high performance processing is at the heart of each of these aspects. We are experiencing the need for advances in data handling and processing as never before. Modernization of data creation and handling has heightened requirements and stimulated advancements in the areas of AI, Machine Learning and data transmission. The high performance computing demands have increased nonlinearly to meet the increasing needs at data origination, edge computing, transmission backbones and datacenters. The design objective metrics have not really changed throughout these evolutions in computing, but the emphasis has shifted. Where the focus was previously only on frequency, and then on isolated low power-centric solutions, the emphasis is now on the total energy: Performance per watt is everything. In addition to Energy efficiency (performance/watt), productivity and capacity is extremely important across a wide variety of compute areas. The demands are present in AI/ML, networking, cloud computing, and autonomous/advanced driver assistance systems. The challenges require not only advances in process technology and associated tools and flows, but also a tight collaboration with the eco system and design community. Through proactive industry collaboration Cadence has enhanced the high performance computing platform to address and manage performance, power and productivity for the full variety of applications. We will provide a preview to Cadence’s wholistic solution addressing industry needs through this session. |