Thursday, October 7, 2021
[WiSoC Session] 11:50~13:00
Intel Academic Research – The heartbeat of a company
Mandy has recently taken up a role as TA-Chief of Staff, Lead Technologist for Intel’s Design Engineering Group as of April 2021. In her previous role, she served as Academic Research Director and Principal Engineer, working with leading academic researchers worldwide and senior technical leaders at Intel to seed and drive research efforts in areas of strategic importance to Intel in particular and the computing industry in general. Prior to this, as Intel’s lead technologist in the area of power delivery and power management, she investigated and drove several issues in the power space, particularly on-chip power delivery issues, power management and power reduction on the Intel next generation high volume server microprocessors. She has led Intel’s die power delivery company wide synergy efforts and recently driven Intel’s power delivery Roadmap program. Further, she has also been a key player in driving and deploying Intel’s internal innovation programs. She has published 20+ technical papers in prestigious VLSI conferences and journals, has 3 issued patents and 5 pending patents. She has been given the distinguished SRC (Semiconductor Research Corporation) Champion award for 2021. Mandy received her Bachelors (B.Tech) in Computer Science and Engineering from I.I.T Kharagpur, India, a Masters (MS) in Electrical Engineering and a Doctorate (PhD) in Electrical and Computer Engineering from Georgia Institute of Technology, Atlanta, GA. She joined Intel in 2001 as part of the Alpha team acquisition from Compaq Computer Corporation where she worked since graduating in 2000.
In a time when Intel faces multiple competitive challenges to its core business, and is striving to make forays into new markets in the AI and FGPA arenas, it behooves Intel to look outwards for any and all future disruptive technologies that hold promise. Intel has a significant investment in University Research ranging from large Semiconductor Research Corporation (SRC) investments to medium sized Intel sponsored Centers to small single PI grants in targeted technical areas that line up with Intel’s strategic direction. Being at the absolute forefront of Intel’s pipeline of products, Intel University Research looks at cutting edge “pre-competitive” perspectives with potential industry impact and plays a very critical role in defining Intel’s forward looking portfolio. This is accomplished through Intel Technical Champions working closely with world-class academics and their students (the future generation of engineers). Spanning core areas of Devices, Circuits, Memory, CAD and Architecture, Connectivity, Software, as well as application areas like Security, AI, Programmable Solutions, we have had many success stories around:
1. Setting new direction (internally/externally)
[WiSoC Session] 11:50~13:00
Breaking the boundaries between Compute and Memory, can we?
Dr. Myung-Hee Na is the Vice President of Revolutionary Technology Center (RTC) at SK Hynix since March 2021. Before joining SK Hynix, she was the Vice President of Technology Solutions and Enablement at imec from 2019 to 2021. After completing her Ph.D in Physics, Dr. Na started her career at IBM in 2001, where she held various technical, managerial and executive roles until early 2019. During that time, she was promoted to Distinguished Engineer and Technical Executive. At IBM Research, she successfully led Research and Development for multiple generations of semiconductor technologies, including high-K metal gate, FinFET, and Nanosheet development. She received several Outstanding Technical Achievement Awards for her technical contributions. Moreover, she has co-authored numerous research papers and holds several U.S. and international patents.
As data-centric compute demands increases, higher memory bandwidth and capacity becomes ever more important for system scaling. At the same time, the demands for new memory such as storage class memory have been increasing to enhance the system performance for both storage-like and memory-like spaces. As we have entered into memory-centric systems, the boundaries between compute, memory and storage become more blur for system performance. This opens up opportunities for new memory-compute options which may bring values to compute and memory and storage simultaneously to eliminate Von Neumann bottleneck in current system architectures.